ECT114 Week 2 Homework
 Develop the logic symbol for logic gates showing two or more inputs.
 Identify the following logic gates by writing the name of the logic gate in the space provided. (5 Points)
SYMBOL OF LOGIC GATE  NAME OF LOGIC GATE  
Ex.  2input XNOR gate  
a.  _______________________________ 

b.  _______________________________ 

c.  _______________________________ 

d.  _______________________________ 

e.  _______________________________ 
 Generate the Boolean expression for the output of the logic gates using two or more input variables.
 Using the CPLD software, open a new Block Diagram/Schematic file. Draw the logic gate symbol for the following Boolean expressions. Connect and label input and output pins. Generate a schematic printout. (2 Points)
 X = A + B + C
 Y = A Å B
 For each logic gate write a corresponding Boolean expression in the space provided. (4 Points)
SYMBOL OF LOGIC GATE  BOOLEAN EXPRESSION  VHDL STATEMENT  
Ex.  Z = A·B  Z <= A AND B;  
a.  _______________________________ 
_______________________________ 

b.  _______________________________ 
_______________________________ 

c.  _______________________________ 
_______________________________ 
 Create a truth table and timing diagram showing all possible input states for two or more input gates.
 Given the logic gate symbol, generate the corresponding truth table. (4 Points)
a.  Input B (H or L) 
Input A (H or L) 
Lamp (ON or OFF) 

___  ___  _______  
___  ___  _______  
___  ___  _______  
___  ___  _______ 
b. 
Input B (H or L) 
Input A (H or L) 
Lamp (ON or OFF) 

___  ___  _______  
___  ___  _______  
___  ___  _______  
___  ___  _______ 
 Given the following Boolean expressions, generate the corresponding truth tables. ( Points)
a.
 Observe the following waveforms. (4 Points)
 Which output waveform would be produced if INPUT1 and INPUT2 were the inputs to an AND gate? Is it waveform A, B, C, D, or E? Answer: ____
 Which output waveform would be produced if INPUT1 and INPUT2 were the inputs to an XOR gate? Is it waveform A, B, C, D, or E? Answer: ____
 Observe the following waveforms for inputs A, B, and C. (4 Points)
 If A and B were the input signals to a gate, draw the timing diagram of the output W.
 If A, B, and C were the input signals to a gate, draw the timing diagram of the output X.
 Given the following truth tables, draw the corresponding logic gate symbol, determine its Boolean expression, and write the VHDL assignment statement. (6 Points)
a. 

Symbol: Output X = ____________ VHDL: X <= ____________ 
b. 

Symbol: Output X = ____________ VHDL: X <= ____________ 